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mohitmishra786mohitmishra786/low-level-dev-skills/skills/baremetal/uart-serial-baremetal/SKILL.md

uart-serial-baremetal

Skill290 starsChanged 7 months agoMITView on GitHub

Bare-metal UART skill for serial console and debug. Use when configuring baud rate, polling or IRQ-driven TX/RX, or integrating DMA with UART. Activates on queries about UART bare-metal, baud BRR, serial printf, or USART interrupt.

The file

We split this skill into the rules it gives an agent

1 rule. About 0 are common, 0 are distinctive, and 1 is very specific to this project.

  • ≈0

    Common · estimate

    Many files like this have a rule of this kind.

  • ≈0

    Distinctive · estimate

    This author's own choices. Worth a look.

  • 1

    Very specific

    Tied to their project's names, files or tools. Probably skip.

  • Common
  • Distinctive
  • Very specific
  1. Very specific:

    Verify pclk from actual clock tree (SystemCoreClock, APB prescaler).

    line 37

≈ “Common” is an estimate: at least 1 in 5 of the 350,495 skill files we read have a rule of the same kind, not the same words. “Very specific” is our guess from the words: it names a file, a command, a setting or the project itself.

Keep what fits and drop the rest. Your version, ready for your agents.
Files
SKILL.md

UART Serial (Bare-Metal)

Purpose

Implement UART/USART for debug console and device communication: baud rate calculation, 8N1 framing, polling and interrupt-driven I/O, overrun handling, and optional DMA basics.

When to Use

  • First printf/log output on new hardware
  • Serial protocol to sensor/module
  • Replacing blocking HAL_UART with minimal driver
  • Fixing garbled or missing characters

Workflow

1. Baud rate (STM32)

BRR = pclk / (16 * baud)   /* oversampling by 16 — check RM for USART */
void usart2_init(uint32_t pclk, uint32_t baud) {
    RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
    /* GPIO PA2/PA3 AF — see gpio-baremetal */

    USART2->BRR = pclk / baud;  /* simplified — RM has fractional formula */
    USART2->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE;
}

Verify pclk from actual clock tree (SystemCoreClock, APB prescaler).

2. Polling TX/RX

void uart_putc(USART_TypeDef *u, char c) {
    while (!(u->SR & USART_SR_TXE))
        ;
    u->DR = (uint8_t)c;
}

char uart_getc(USART_TypeDef *u) {
    while (!(u->SR & USART_SR_RXNE))
        ;
    return (uint8_t)u->DR;
}

3. Interrupt-driven RX ring buffer

void USART2_IRQHandler(void) {
    if (USART2->SR & USART_SR_RXNE) {
        uint8_t b = USART2->DR;
        rb_push(&rx_rb, b);
    }
    if (USART2->SR & USART_SR_ORE) {
        (void)USART2->DR;  /* clear overrun — required on STM32 */
    }
}

4. retarget printf (newlib)

int _write(int fd, char *ptr, int len) {
    (void)fd;
    for (int i = 0; i < len; i++)
        uart_putc(USART2, ptr[i]);
    return len;
}

Link with --specs=nosys.specs or provide full syscalls.

5. Agent usage

/uart-serial-baremetal Calculate USART BRR for 115200 at 84 MHz PCLK

Common Problems

SymptomCauseFix
Garbage charsWrong baud/PCLKRecompute BRR; check APB divider
Lost bytesORE not clearedRead DR on ORE; use IRQ + ringbuf
No outputTX pin not AFGPIO alternate function
printf hangs_write missingImplement retarget

Related Skills

  • skills/baremetal/gpio-baremetal — TX/RX pin mux
  • skills/baremetal/interrupts-and-exceptions-baremetal — USART IRQ
  • skills/baremetal/dma-baremetal — UART RX DMA
  • skills/embedded/openocd-jtag — semihosting alternative

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