adc-dac-baremetal
Skill290 starsChanged 7 months agoMITView on GitHub
Bare-metal ADC and DAC skill. Use when configuring analog sampling, DMA-driven ADC, calibration, or DAC output on MCUs. Activates on queries about ADC bare-metal, sampling time, DMA ADC, or DAC channel setup.
In this repository142 other files it gives its agents.
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The file
We split this skill into the rules it gives an agent
1 rule. About 0 are common, 0 are distinctive, and 1 is very specific to this project.
≈0
Common · estimate
Many files like this have a rule of this kind.
≈0
Distinctive · estimate
This author's own choices. Worth a look.
1
Very specific
Tied to their project's names, files or tools. Probably skip.
- Common
- Distinctive
- Very specific
- Very specific: line 37
Run ADC_Calibration() / ADC_CR2_RSTCAL/CAL per RM on F1/F4 families.
≈ “Common” is an estimate: at least 1 in 5 of the 350,495 skill files we read have a rule of the same kind, not the same words. “Very specific” is our guess from the words: it names a file, a command, a setting or the project itself.
Files
ADC and DAC (Bare-Metal)
Purpose
Configure ADC and DAC peripherals: channel selection, sampling times, calibration sequences, DMA circular buffers, and DAC static/dynamic output.
When to Use
- Reading analog sensors (temperature, voltage)
- Audio or control voltage output via DAC
- Continuous sampling with DMA
- Post-reset ADC calibration on STM32
Workflow
1. STM32 ADC single conversion
/* Enable ADC1 and GPIOA clock; PA0 analog mode */
ADC1->CR2 |= ADC_CR2_ADON;
for (volatile int i = 0; i < 10000; i++); /* stabilization — RM value */
ADC1->SMPR2 |= ADC_SMPR2_SMP0_2; /* 84 cycles sample time ch0 */
ADC1->SQR3 = 0; /* channel 0, 1 conversion */
ADC1->CR2 |= ADC_CR2_SWSTART;
while (!(ADC1->SR & ADC_SR_EOC))
;
uint16_t sample = ADC1->DR;Run ADC_Calibration() / ADC_CR2_RSTCAL/CAL per RM on F1/F4 families.
2. DMA circular ADC
/* ADC1 → DMA2 Stream0, circular mode into buffer[64] */
/* Configure DMA: periph-to-mem, halfword, increment mem, circular */
ADC1->CR2 |= ADC_CR2_DMA | ADC_CR2_CONT;
DMA2_Stream0->CR |= DMA_SxCR_EN;Half-transfer / transfer-complete IRQs for double buffering.
3. DAC output (STM32)
RCC->APB1ENR |= RCC_APB1ENR_DACEN;
DAC->CR |= DAC_CR_EN1;
DAC->DHR12R1 = 2048; /* mid-scale 3.3V reference */4. Agent usage
/adc-dac-baremetal Set up ADC1 channel 0 with DMA circular bufferCommon Problems
| Symptom | Cause | Fix |
| Noisy readings | Short sample time | Increase SMP bits |
| Stuck EOC | Clock not enabled | RCC ADC enable |
| Wrong voltage | Vref not 3.3V | Measure VDDA; calibrate |
| DMA corrupt | Buffer alignment | Use uint16_t aligned buffer |
Related Skills
skills/baremetal/dma-baremetal— ADC DMA streamsskills/baremetal/timers-pwm-baremetal— ADC external triggerskills/baremetal/gpio-baremetal— analog pin mode
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