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fault-forensics

Skill28 starsChanged 29 days agoMITView on GitHub

Analyze embedded panic logs, Cortex-M fault registers, core dumps and addresses against the matching firmware ELF. Use when requests involve HardFault, BusFault, UsageFault, reset crashes or corrupted backtraces; no unsupported CPU decoding.

1 other project uses a version of this.

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The file

We split this skill into the rules it gives an agent

3 rules. About 0 are common, 3 are distinctive, and 0 are very specific to this project.

  • ≈0

    Common · estimate

    Many files like this have a rule of this kind.

  • ≈3

    Distinctive · estimate

    This author's own choices. Worth a look.

  • 0

    Very specific

    Tied to their project's names, files or tools. Probably skip.

  • Common
  • Distinctive
  • Very specific
  1. Distinctive:

    Read the shared embedded contract and keep source/build, device and physical evidence separate.

    line 9
  2. Distinctive:

    Read capture and architecture.

    line 12
  3. Distinctive:

    Check precise versus imprecise bus errors, failed stack/unstack, and valid MMFAR/BFAR bits before treating an address as evidence.

    line 25

≈ “Common” is an estimate: at least 1 in 5 of the 350,495 skill files we read have a rule of the same kind, not the same words. “Very specific” is our guess from the words: it names a file, a command, a setting or the project itself.

Keep what fits and drop the rest. Your version, ready for your agents.
Files
SKILL.md

Fault Forensics

Read the shared embedded contract and keep source/build, device and physical evidence separate.

Read capture and architecture. Preserve the original log/register dump, reset reason, exact ELF/map, revision, build options and architecture before rebooting or rebuilding. Never symbolize against a newer binary merely because its filename matches.

For ARMv7-M Cortex-M3/M4/M7, run the offline uv run scripts/decode_cortex_fault.py CAPTURE.json on the documented schema. It reports set bits, valid fault addresses and unresolved cause. It does not read hardware or establish that a stacked PC identifies the initiating instruction. Cortex-M0/M0+ and ARMv8-M have different fault facilities; ESP32 Xtensa/RISC-V panic formats use the matching vendor decoder instead.

Correlate CFSR/HFSR, stack-frame integrity, EXC_RETURN and the matching ELF. Check precise versus imprecise bus errors, failed stack/unstack, and valid MMFAR/BFAR bits before treating an address as evidence. A HardFault escalation is not a root cause. Use the selected toolchain addr2line offline and retain its version and unknown-address output.

Deliver observed facts, competing explanations and one discriminating next check. Preserve evidence before changes to watchdogs, assert handling or fault recovery. Do not hide a crash by disabling detection.

See platform coverage for the exact tested combination. A source procedure is not a claim that every target was tested.

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